1. Field of the Invention
An example embodiment of the present invention generally relates to a semiconductor device and a manufacturing method thereof. More particularly, an example embodiment of the present invention relates to a semiconductor device having a structure capable of preventing disconnections of a conductive film over contact holes.
2. Related Art
Memories generally include a DRAM (Dynamic Random Access Memory), an SRAM (Static Random Access Memory), a flash memory, a FeRAM (Ferroelectric Random Access Memory), and the like. The DRAM and the SRAM are characterized by losing its stored data when the power supply is turned off, while the FeRAM and the flash memory are characterized by not losing its stored data even if the power supply is turned off.
The FeRAM is a nonvolatile memory based on characteristics of a ferroelectric material, and uses a noble metal such as platinum (Pt) or iridium (Ir), or a ferroelectric material such as PZT (Pb(Zr1-xTix)O3) or SBT (SrBi2Ta2O9). Since it is difficult to process these materials, the FeRAM manufacturing process is complicated as compared to typical memory manufacturing processes such as LSI, DRAM, SRAM, and flash memory.
For example, the ferroelectric material is formed by using MOCVD (Metal Organic Chemical Vapor Deposition) or MOD (Metal Organic Decomposition). In order for ferroelectricity to develop, sintering in an oxygen atmosphere at about 700° C. to about 800° C. is required as a post-treatment. A material capable of retaining its conductivity even after oxidization, such as platinum, is therefore used as an electrode material of a ferromagnetic capacitor. However, platinum is a thermally shrinkable material and is therefore is susceptible to disconnections. Accordingly, it is important to form an underlying film of the platinum film in such a shape that prevents disconnections of the platinum film. Disconnections are likely to be generated especially when platinum is formed over a ferroelectric material having a hole pattern.
For example, Japanese Laid-Open Publication No. H04-125925 proposes a semiconductor device as a structure for preventing disconnections of a conductive film formed over a hole pattern.
FIGS. 6A through 6E are cross-sectional views of a main part sequentially illustrating a manufacturing method of the semiconductor device of the related art.
As shown in FIG. 6A, an interlayer insulating film 102 is first formed on a semiconductor substrate 101, and a resist pattern 103 having an opening in a predetermined region is formed on the interlayer insulating film 102.
As shown in FIG. 6B, by using the resist pattern 103 as a mask, a hole 104 having a predetermined depth is then formed in the interlayer insulating film 102 by anisotropic etching.
As shown in FIG. 6C, a deposition film (polymerization film) 105 is then formed over the whole surface of the semiconductor substrate 101 including the inside of the hole 104.
As shown in FIG. 6D, the deposition film 105 is then etched by anisotropic etching. The deposition film 105 thus remains only on the sidewall of the hole 104. A hole 106 is formed by continuing the anisotropic etching by using this remaining deposition film 105 as a mask. The hole 106 extends through the interlayer insulating film 102 at the bottom of the hole 104 and exposes the semiconductor substrate 101.
As shown in FIG. 6E, the deposition film 105 remaining in the hole 104 and the resist pattern 103 remaining on the top surface of the interlayer insulating film 102 are then removed by etching. As a result, holes 107 and 106 are formed in the interlayer insulating film 102. The hole 107 is located in the upper part of the interlayer insulating film 102 and has a wide opening diameter. The hole 106 communicates with the hole 107 and has a smaller opening diameter than that of the hole 107. A stepped shape is thus formed in a portion of the interlayer insulating film 102 which is exposed to the holes 106 and 107.
As has been described above, according to the manufacturing method of the semiconductor device of the related art, coverage of a conductive film over the hole pattern is improved by forming the stepped shape in the portion exposed to the hole pattern. Generation of disconnections is therefore suppressed.